发明名称 HIGH OUTPUT LOGIC CIRCUIT
摘要 PURPOSE:To establish the high output logic circuit which can obtain high output level without increasing the manufacturing process and power consumption. CONSTITUTION:The circuit consists of the depletion type MISFET Q1 connecting the gate and the source and the depletion type MISFET Q2 connecting the gate and the drain provided in parallel with Q1, and the W/L ratio is set to Q1 so that it is turned on under the high power supply voltage showing substrate effect as load means and the enhancement MISFET Q3 is taken as drive means.
申请公布号 JPS54101253(A) 申请公布日期 1979.08.09
申请号 JP19780007272 申请日期 1978.01.27
申请人 HITACHI LTD 发明人 TAKANASHI RIN;IWABUCHI MASARU
分类号 H03K19/0185;H03K19/0944 主分类号 H03K19/0185
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