发明名称 MULTIILINK ERROR CONTROL SYSTEM
摘要 PURPOSE:To improve transmission efficiency by making preceding node information ineffective in case of occurrence of a transmission error and then by adding a new check code. CONSTITUTION:A data block transmitted from preceding node A is inputted from selector circuit SEL(1) to check CHK and result R is fed back to SEL(1), thereby using the circuit as generator GEN this time. Data from the preceding node, on the other hand, are stored temporarily in buffer memory BFM and then sent out from selector circuit SEL(2) with the check result added. Without being inputted to check circuit CHK, data until the node two stages ahead are transmitted by timing control circuit CTLTIM directly from the gata circuit to next node B.
申请公布号 JPS54100604(A) 申请公布日期 1979.08.08
申请号 JP19780007093 申请日期 1978.01.25
申请人 FUJITSU LTD 发明人 KOJIMA TAKUTO;NAITOU SHIYUNICHI
分类号 H04L1/00;H04Q11/04 主分类号 H04L1/00
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