发明名称 INPUT/OUTPUT PROCESSOR
摘要 A data processing system having a host processor, a host memory, a host memory management unit and an input/output bus and further including a separate input/output (I/O) processor with its own local memory for handling the transfer of data between I/O devices on its own I/O processor I/O bus and the host main memory. The I/O processor has the capability of directly accessing main memory via the host standard data channel. The I/O processor has the capability of interrupting the host processor operation in a special way by a "micro-interrupt" process such that the host processor thereby re-allocates the contents of a selected memory allocation unit (MAP) of the host memory management unit faster than using standard interrupt routines. Such re-allocation then permits the I/O processor to transfer data directly to and from the host main memory via the re-allocated memory management unit without the need for further processing by the host processor, the I/O processor providing a suitable identification of the selected MAP which is to be re-allocated. The system further prevents access to the host memory by any other I/O processor while a first I/O processor is performing a read-modify-write operation with respect to the host memory.
申请公布号 AU4322679(A) 申请公布日期 1979.08.02
申请号 AU19790043226 申请日期 1979.01.09
申请人 DATA GENERAL CORP. 发明人 NAME NOT GIVEN
分类号 G06F13/14;G06F9/46;G06F12/10;G06F13/10;G06F13/12;G06F13/24;G06F15/16;G06F15/177 主分类号 G06F13/14
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