发明名称 ADDRESS CONVERSION SYSTEM
摘要 PURPOSE:To supply the address conversion system where the trouble of concurrence of mapping registers is eliminated, by providing a physical program counter besides a logical program counter to shorten the time for address conversion. CONSTITUTION:At a normal access time, the access to memory 3 is performed by physical program counter 22, and the access completion time, countup output 14 which increases contents of logical and physical program counters 12 and 22 by +1 is outputted to provide for the next access. At a jump or interrupt occurrence time, a new value which is given by the output of operator 11 is set to logical program counter 12. The set address is converted to a physical address by mapping register group 21, and the physical address is set to physical program counter 22.
申请公布号 JPS5498126(A) 申请公布日期 1979.08.02
申请号 JP19780004198 申请日期 1978.01.20
申请人 HITACHI LTD 发明人 FUKUNAGA YASUSHI
分类号 G06F12/10;G06F9/32;G06F9/34;G06F12/02 主分类号 G06F12/10
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