发明名称 SWICHING SYSTEM FOR DUPLICATED MAIN MEMORY DEVICE
摘要 PURPOSE:To perform switching when the counter has an overflow and all hard- system constitutions complete the combination trial after memorizing the combinations of the hard-system constitutions via the counter circuit. CONSTITUTION:When emergency circuit 23 is started with occurrence of the system fault, the operation is carried out for the system constitution through the combination of central processor 20a, 20b and others. And the signals are generated at control line 25 when the counter in circuit 23 counts up to the prescribed value. Thus, main memory device group 500a and 500b are switched to the OFF-line and the ON-line respectively.
申请公布号 JPS5493925(A) 申请公布日期 1979.07.25
申请号 JP19780000240 申请日期 1978.01.06
申请人 HITACHI LTD 发明人 ITOU TAKESHI
分类号 G06F12/16;G06F13/00 主分类号 G06F12/16
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