发明名称 Semiconductor integrated circuit device with dual thickness poly-silicon wiring
摘要 A semiconductor integrated circuit device consisting of silicon gate MOS transistors. A polycrystalline silicon wiring layer is formed on a field insulating layer and connected with a polycrystalline gate electrode layer having a smaller thickness than that of the wiring layer, whereby the resistance of the wiring layer is reduced without making the gate electrode layer thick.
申请公布号 US4162506(A) 申请公布日期 1979.07.24
申请号 US19780923223 申请日期 1978.07.10
申请人 TOKYO SHIBAURA ELECTRIC CO LTD 发明人 TAKEI, SAKAE
分类号 H01L23/528;H01L29/49;(IPC1-7):H01L29/04 主分类号 H01L23/528
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