发明名称 MEMORY CIRCUIT
摘要 <p>PURPOSE:To realize operation with low power consumption by composing an input part controlling memory cells of two transistors and several diodes, and to attain independent ON-OFF control of cells arrayed in a matrix. CONSTITUTION:The input part of memory cell 2 stored with information is provided with input terminals (x) and (y) and control input part 1 supplied with pieces of information from DATA and ME, and this input part 1 is with two transistors TrT1 and TrT4 and two diodes D1 and D2 or more. The collector of TrT1 of this control part 1 is connected to the input part of memory cell 2, its base is to the emitter or collector of TrT4, and its emitter is to diode D1 with its cathode side connected to input terminal DATA; and the base of TrT4 is connected to input terminal (y) via resistance R1, and its collector or emitter is to input terminal (x). Further, the cathode of diode D2 is connected to input terminal ME and the anode of diode D2 is to the base of TrT1, thereby controlling memory cell 2.</p>
申请公布号 JPS5491029(A) 申请公布日期 1979.07.19
申请号 JP19770157864 申请日期 1977.12.28
申请人 HITACHI LTD;NIPPON TELEGRAPH & TELEPHONE 发明人 OHIGATA ICHIROU;SUZUKI HIDEO;OOGOSHI MASAE
分类号 G11C11/41;G11C11/39;G11C11/411 主分类号 G11C11/41
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