| 摘要 |
PURPOSE:To reduce a source junction capacity to make a high-speed operation possible and eliminate the operation faulty dependent upon punch through by growing single crystal and poly-crystal Si layers on an insulating film which has an aperture and forming a double-diffusion-type IGFET there. CONSTITUTION:Though thick SiO2 film 20 is buried in a prescribed region of P<+>- type si substrate 11 and a N<->-type layer is grown epitaxially throughout the surface, single crystal Si layer 21 and poly-crystal Si layer 22 are grown on exposed substrate 11 and film 20 respectively. Next, these layers are subjected to mesa etching and are made into island-shaped patterns, and these patterns are covered with diffusion mask 23, and P-type region 15, which becomes the channel of the driver-side FET, between layers 21 and 22 is formed by diffusion. After that, mask 23 is updated to mask 23' to form N-type source region 12 and drain region 13 of the driver-side FET and source region 13' and drain region 14 of the load-side FET by diffusion. Next, mask 23' and oxide film 24 generated at this time are removed to cause gate oxide film 26 to adhere to the gate region. |
