发明名称 SERIAL DATA RECEPTION SYSTEM
摘要 <p>A serial data reception system comprises a multi-bit shift register for storing serial data while shifting them in response to clock pulses, a plurality of reception circuits each including gate circuits connected to certain bit positions of said shift register and memory circuits connected to the gate circuits, and a decoder connected to remaining bit positions of said shift register for enabling the gate circuits in a selected one of said plurality of reception circuits in accordance with the content of said remaining bit positions.</p>
申请公布号 CA1058764(A) 申请公布日期 1979.07.17
申请号 CA19760259503 申请日期 1976.08.20
申请人 HITACHI, LTD. 发明人 OHNUMA, TATSUMASA;YAMASHITA, HIDETAKA;YOSHIZAKI, MASAAKI
分类号 H04M3/60;H04M3/62;(IPC1-7):11C19/00;04M1/57;04M1/56 主分类号 H04M3/60
代理机构 代理人
主权项
地址