发明名称 Data-in amplifier for an MISFET memory device having a clamped output except during the write operation
摘要 In a MIS random access memory device including a data-in amplifier and MIS memory cells, a device is provided for holding the output level of the data-in amplifier at the precharge potential of the memory cells except during a write operation by controlling an input circuit and a driver circuit of the data-in amplifier through utilizing the read/write signal and the control signal for the memory. Data stored in the memory cells are free from the influence of the output of the data-in amplifier during a non-write operation.
申请公布号 US4161040(A) 申请公布日期 1979.07.10
申请号 US19770798865 申请日期 1977.05.20
申请人 HITACHI, LTD. 发明人 SATOH, TAKASHI
分类号 G11C11/41;G11C11/34;G11C11/409;G11C11/4093;G11C11/417;H03K5/02;H03K19/0175;(IPC1-7):G11C7/02 主分类号 G11C11/41
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