COMPLEMENTARY ENHANCEMENT MODE MOS TRANSISTOR STRUCTURE WITH SILICON GATE

摘要

COMPLEMENTARY ENHANCEMENT MODE MOS TRANSISTOR STRUCTURE WITH SILICON GATE A p+ doped silicon gate metal oxide complementary transistor structure fabricated on a p-type substrate of semiconductor material with an insulating layer of silicon dioxide on the surface of the substrate and an outer layer of glass disposed over the insulating layer, An intermediate layer of electrically conductive p+ doped polycrystalline silicon is disposed between the layers of silicon dioxide and glass, This layer forms the silicon gate for enhancement mode complementary MOS transistors.