| 摘要 |
<p>PURPOSE:To reproduce the clock pulse in a short time and less in the phase shift, by resetting the counter causing the reproducing clock pulse directly obtaining the average of the phase of input signal. CONSTITUTION:The gate signal production circuit 14 outputs the gate pulse x14 having the width in proportional to the phase difference between the input signal x10 and the reproducing clock pulse x12 from the counter 12, the gate circuit 13 passes through the high speed pulse train X11 as the pulse train X13 only at the period of the pulse width of X14, and the counter 15 rises the output X15 when it is counted by N. On the other hand, when the N sets of pulses X14 is counted, the output X16 rises and changes over the gate circuit 17 passed through the counter 18 for passing through the pulse train X11. The counter 18 counts the pulse train X11 for the time subtracting the time of one period of pulse X12 for the average value of the width of the pulse X14, rising the output X18. Further, the phase synchronism is made to the average phase of the input signal varying point in jitter for the pulse X12, by resetting the countr 12.</p> |
