发明名称 ANORDNING FOR ATT UPPRETTHALLA SYNKRONISM I ETT DIGITALT TELEKOMMUNIKATIONSNET
摘要 An arrangement for maintaining synchronism in a digital telecommunication network comprises a plurality of transit stations. Each transit station includes a clock means (1) which is arranged to supply a local station clock signal and which is provided with a control input (3). A comparator means (5) has a first input arranged to be supplied with line clock signals associated with a plurality of incoming lines from the other transit stations and a second input arranged to be supplied with said local station clock signal. The comparator means is also provided with a signal output (6) arranged to supply sequentially local comparison signals for the line clock signals and connected to the control input of the clock means. The last mentioned connection is effected by means of a loop filter comprising a memory means (24) having an address input (25) and a read output (26) and which is arranged to store selected weighting coefficients for the line clock signals, an address counter means (27) having an output (33) arranged for a sequential read out of address words associated with the local comparison signals for said line clock signals and connected to the address input of the memory means, and a multiplier means (34) having a first input connected to the signal output of the comparator means, a second input connected to the read output of the memory means and an output connected to the control input of the clock means via an averaging means (38). According to the invention, the loop filter is localized in a central monitoring station in the telecommunication network wherein it is connected between the signal output (6) of the comparator means (5) and the control input (3), of the clock means (1) in said transit stations via a first and second signalling channel in the telecommunication network and wherein buffer storage means (36) are arranged for said local comparison signals for the line clock signals. The buffer storage means have an address input (46) for read out connected to the output (33) of said address counter means (27).
申请公布号 SE7714965(A) 申请公布日期 1979.07.01
申请号 SE19770014965 申请日期 1977.12.30
申请人 * TELEFON AB L M ERICSSON 发明人 W * GHISLER;A * MARLEVI
分类号 H04J3/00;H04J3/06;H04Q11/04;(IPC1-7):H04J3/06 主分类号 H04J3/00
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