| 摘要 |
<p>PURPOSE:To enable to perform safety usage to a plurality of CPU's, by using the clock and refresh request signal of itself in place of the signal for the memory at CPU side, when the clock of the conditional signal representing the difference for the clock in use by each CPU is different. CONSTITUTION:The clock from CPUo and CPU1 delivered via the lines l1 and l2 at the memory side is received with the AND gates g100 and g101, and the refresh request signals RRO and RR1 are received with the AND gates g90 and g91. Then, the conditional signal representing the difference of the clock in use with each computer is fed from the computers CPUo and CPU1 to memory, and if the clock is different at the memory side, the clock and the refresh request signal from the refresh request circuit IRR and the internal clock oscillator ICO of itself are used in place of the clock and the refresh request signal from the computer side, allowing to perform safety use to a plurality of CPU's different in the clock.</p> |
