发明名称 DIGITAL CIRCUIT
摘要 PURPOSE:To secure normal operation over all devices with normal clock signal supplies even if many supplies get out of order and only one supply operates normally, by providing a plural number of clock signal supplies. CONSTITUTION:Oscillation frequencies (f1) and (f1') of independent oscillation circuits 1 and 1' are applied to divider circuits 2 and 2' at an adequate stage, whose outputs are inputted to flip-flop 5 via OR gate 4. Output Q of flip-flop 5 is supplied as clock CL for the reference signal of a device and also resets divider circuits 2 and 2'. Further, the output of the entire stage of divider circuits 2 and 2' is connected to the input of AND gate 6. In this constitution, only the signal of the highest frequency is selected from a plural number of signals and outputted and even if one of supplies gets wrong and stops, a signal from normal one is outputted, thereby protecting devices from a fault.
申请公布号 JPS5481051(A) 申请公布日期 1979.06.28
申请号 JP19770149487 申请日期 1977.12.12
申请人 SEIKO INSTR & ELECTRONICS 发明人 KUSUMOTO YASUO
分类号 G06F11/00;G06F1/04 主分类号 G06F11/00
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