发明名称 HIGH SPEED BUFFER MEMORY SYSTEM
摘要 A word oriented data processing system includes a plurality of system units all connected in common to a system bus. Included are a central processor unit (CPU), a memory system and a high speed buffer or cache system. The cache system is also coupled to the CPU. The cache includes an address directory and a data store with each address location of directory addressing its respective word in data store. The CPU requests a word of cache by sending a memory request to cache which includes a memory address location. If the requested word is stored in the data store, then it is sent to the CPU. If the word is not stored in cache, the cache requests the word of memory. When the cache receives the word from memory, the word is sent to the CPU and also stored in the data store.
申请公布号 AU4284078(A) 申请公布日期 1979.06.28
申请号 AU19780042840 申请日期 1978.12.22
申请人 HONEYWELL INFORMATION SYSTEMS INC 发明人 THOMAS F. JOYCE;THOMAS O. HOLTEY;WILLIAM PANEPINTO, JR.
分类号 F02B75/02;G06F12/08;G06F12/12 主分类号 F02B75/02
代理机构 代理人
主权项
地址