| 摘要 |
<p>PURPOSE:To decrease the power consumption by providing MOSFET to receive the control signal and the address decoding signal at the gate respectively in the MOS static memory using no clock and then turning on the MOSFET at the memory selection time and turning off at the non-selection time respectively. CONSTITUTION:MOSFET T2-T7 with address input terminals a0-a5 connected to the gate plus the inverter comprising MOSFET T1 and 1st MOSFET T8 with control signal phi connected to the gate are connected between power source VCC and the earth. Furthermore, MOSFET T11 is installed to receive signal phi at the gate, and MOSFET T12 and T13 are connected in series to FET T11 and then connected between Vcc and the earth. At the sane time, output terminals A of FET T2-T7 are connected to the gate of FET T12, and furthermore to the gate of FET T10. Then signal phi is set to H-level at the active time and to L-level at the waiting time, and at the same time FET T8 and T11 are turned off at the waiting time to cut off the current to be supplied to the memory.</p> |
