INTEGRATED CIRCUIT DEVICE INCLUDING BOTH N-CHANNEL AND P-CHANNEL LATED GATE FIELD EFFECT TRANSISTORS

摘要

A complementary MOS integrated circuit device, adapted for fabrication with relatively high circuit density, includes relatively fast transistors with a closed gate geometry. Permanently-off gates surround transistors to isolate them from other transistors. A method of making this structure involves self-aligned gate techniques in which the sources and drains are defined as regions which surround the gates and are surrounded by the gates, respectively.