| 摘要 |
PURPOSE:To divide a number less than zero with no sudden variation in dividing ratio by mainly using two divider circuits and an up-down counter. CONSTITUTION:The contents of counter 60 becomes zero with a preset signal, Q outputs of FFs 61, 62 and 64 ''1'', and the Q output of FF63 ''0''; and then ''1'' is supplied to terminals A and B, so that 1/(m+1-1/n) dividing operation will be attained. With fine-adjustment switch circuit 65 set to the power-supply 67 side, clock 68 is inputtd to the down terminal of counter 60, (n) changes from ''1'' to ''10'' to invert FF62, and signal ''0'' is inputted to terminal A, thereby switching the 1/(m+1/n) dividing operation. Next, when (n) becomes ''2'', a clock is supplied to the up terminal of counter 60 by the outputs of gate 74 and FF61, thereby switching to the 1/(m+1-1/n) dividing operation. In this way, the extremely-fine adjustment of the variation can be achieved by adjusting the signal applied to terminal A and the value of (n). |
