发明名称 MEMORY UNIT
摘要 PURPOSE:To shorten a write time by starting a write operation right after a write signal arrives with no write-signal acceptance time by equipping a memory unit, used by various equipments in common, with a timing control circuit exclusively used for the write operation. CONSTITUTION:Once receiving starting signal 10, read-operation control circuit 5 generates timing used for both read operation and write operation. Receiving a write signal within the write-signal acceptance time, write-operation control circuit 6 inhibits immediately read-operation control circuit 5 from starting its read operation. Write information is fetched in formation control circuit 4 and then sent to memory part 3. Next, the timing needed for writing is sent to memory part 3 via driver circuit 2 and the write operation is finished within a fixed time by the write signal.
申请公布号 JPS5477033(A) 申请公布日期 1979.06.20
申请号 JP19770143934 申请日期 1977.12.02
申请人 HITACHI LTD 发明人 KAMITSUMA YUUSUKE
分类号 G06F12/06;G06F12/00;G11C7/22 主分类号 G06F12/06
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