摘要 |
PURPOSE:To realize the memory control system easy for constitution, by providing the memory storing the accumulated information for the defective group with the memory group storing the information of non-defective and defective loop group in a plurality of information loops of shift register memories. CONSTITUTION:Corresponding to the additional memories 20 and 21 writhing in ''0'' to the address N if the Nth loop group is good and ''1'' if defective, the memories 160 and 161 which write in the difference between the Nth normal loop group number Nm and N to the address N and store the information of the accumulating number of the defective loop group are provided. At a certain time, the address register 4 is collated with the time counter 3, and even if the transfer display FF7 is turned on, the content of the memory 160 is read out at the accumulating display counter 170, and if it is more than 1, the output of the gate 140 and the defective display signal 13 are 1, and no data transfer is made. When time is advanced and the counter 170 is counter down into 0, the output of the gate 180 is 0, and the output of FF7 is inputted from the gate 8 to the transfer control circuit 9, starting transfer. |