发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain SOS.MIS.FET which features a small amount of the leak current inspite of a large amount of the mutual conductance, by narrowing the channel width of the PN junction formed with the drain region and the channel region and also widening the channel width of other areas. CONSTITUTION:Source region S and drain region D are formed on the semiconductor substrate, and then channel region C is grown between region S and D. In this case, channel width W is narrowed near the PN junction, and width W' of region C is set to several times as large as W. As a result, the leak current flowing between the source and drain regions through the area around the island is decreased because of the long path. At the same time, the mutual conductance is increased greatly, thus increasing the current amplification factor. Accordingly, this method becomes very effective when the substrate featuring rather inferior crystalline property is used.
申请公布号 JPS5475281(A) 申请公布日期 1979.06.15
申请号 JP19770143191 申请日期 1977.11.29
申请人 FUJITSU LTD 发明人 SASAKI NOBUO;NAKANO MOTOO;KOBAYASHI YASUO;IWAI TAKASHI
分类号 H01L29/78;H01L27/12;H01L29/786 主分类号 H01L29/78
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