| 摘要 |
PURPOSE:To attain the multiplication that outputs a genuine product having no digit shift without adding any special hardware by using a zero generating means to add 0 to a lower rank bit of a multiplier, applying the weighting to a decoder, and therefore carrying out the multiplication in the least decoding frequency. CONSTITUTION:An m-digit multiplier (excluding codes) is decoded with (d) bits added with one bit each time and finally the data of total (n + 1) bits (n: multiple of d - 1 and larger than m) is decoded. Under such conditions, n - m - (d - 2) pieces of 0 are produced by a means 12. While a decoded data register 13 stores at least the multiplier, the 0 produced by the means 12, and a carry bit. Then the decoding is carried out at and after a lower rank bit including the carry bit. Thus the multiplication result is obtained with the same weight as the input and therefore the efficiency of multiplication is improved. |
