发明名称 CARRIER REGENERATING CIRCUIT
摘要 PURPOSE:To lead in a carrier until the desired phase by utilizing that a phase detection output becomes equal to a signal obtained by partial-response-converting a decoded output at the time of the desired lead-in phase. CONSTITUTION:Outputs of phase detectors PD1 and PD2 are decoded into binary signals by decoders PDE1 and PDE2, and decoded signals are extracted from output terminals OUT1 and OUT2. Those signals are partial-response-converted by coders PCD1 and PCD2, and ternary signals are applied to multipliers MLT1 and MOT2, and voltage control oscillator VCO is synchronized, in terms of phase, with cross partial response modulated waves. Then, if the carrier is led in to the desired phase, the phase detection output becomes equal to the signal converted by the coder, so that the synchronism will be held.
申请公布号 JPS5474356(A) 申请公布日期 1979.06.14
申请号 JP19770141819 申请日期 1977.11.26
申请人 FUJITSU LTD 发明人 OGAWA KAZUO;OZAKI TAKAYUKI
分类号 H04L27/38;H04L27/02 主分类号 H04L27/38
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