发明名称 IC MEMORY CLEAR CIRCUIT
摘要 PURPOSE:To make easy for the memory control and to increase the effieiency in memory control, by writing in the zero data immediately after the readout of data from the memory and by clearing the content of memory, in the clear circuit using IC memory. CONSTITUTION:In the write-in cycle, the input gate 3 of IC memory is opened, the address signal 2, chip enable signal 3 and write-in signal 4 are fed to the memory 6, and the input data 7 is written in the address designated with the signal 2. Next, in the readout cycle, the output data 8 from the memory 6 is reset to the output register 10 with the data set signal 9. Next, the write-in signal 5 is fed to the memory 6. In this case, the input gate of memory 6 is closed, then the input data to the memory 6 is zeroed and the zero can be written in the readout address and the content of the memory 6 can be cleared.
申请公布号 JPS5471530(A) 申请公布日期 1979.06.08
申请号 JP19770137952 申请日期 1977.11.18
申请人 HITACHI ELECTRONICS 发明人 INABA SHIYOUJI
分类号 G11C11/41;G11C7/20 主分类号 G11C11/41
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