发明名称 |
METHOD OF FABRICATING CONDUCTIVE POLYSILICON AND SILICON METAL COUPLING STRUCTURE |
摘要 |
A method and structure for polysilicon lines which include a silicide layer for providing a low sheet resistance. The invention may be employed in a polysilicon gate MOSFET process for integrated circuits as well as other integrated structures. In the method a first layer of polysilicon is deposited followed by a deposition of a metal of the silicide forming type. Another polysilicon layer is then deposited on top of the silicide forming metal to produce a three layer structure. The three layer structure is subjected to heat, for example, during the reoxidation step in a gate fabrication process, the metal reacts with the polysilicon at two reaction fronts to form a silicide. The resultant silicide has a much lower resistivity than doped polysilicon and therefore provides a second conductive layer which can be used more compatibly and efficiently in connection with the normal metal layer employed in integrated circuits to give a two-dimensional degree of freedom for the distribution of signals. |
申请公布号 |
JPS5469972(A) |
申请公布日期 |
1979.06.05 |
申请号 |
JP19780109884 |
申请日期 |
1978.09.08 |
申请人 |
IBM |
发明人 |
FURITSUTSU HAINRITSUHI GAENSUR |
分类号 |
H01L29/78;H01L21/28;H01L21/321;H01L21/336;H01L21/768;H01L23/532;H01L29/423;H01L29/43;H01L29/49 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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