摘要 |
PURPOSE:To satisfy load to be completely balanced by inserting differential output voltage from the final voltage amplifier stage individually into the bias circuit and taking out it. CONSTITUTION:In ETQ3 and Q4 constituting the 2nd stage differential amplifier of the complete balance output differential amplifier, input voltage to which negative feedback is applied to Q3 by the synchronous-phase component denying action of differential amplifier that feedback voltage applied from the power- amplifier stage constituted by Q11 to Q14 through feedback resistance denies output voltage of Q2. On the other hand, feedback voltage applied through R21 and R6 from power- amplifier stage Q7 to Q10 is applied to Q4 so that it denys output voltage of Q1. By making equal the quantity of negative feedback to Q3 and Q4, quantity of R7 and R8 and quantity of each voltage generated in the bias circuit, Q3 and Q4 operate with a completed balanced condition and the absolute value of output voltage applied to load resistance R7 and R8 coincides, so that synchronous- phase components are completely denied and distortion of synchronous-plase comoponents is cleared from output. |