| 摘要 |
An amplifier comprised of a field effect transistor whose gate electrode is adapted to receive an input signal. An impedance converter couples the input signal to the gate electrode of the field effect transistor, the impedance converter being formed of n impedance converting stages, each stage having a relatively low output impedance. A voltage limiting circuit is connected between the source of input signal and the gate electrode of the field effect transistor so as to limit the forward biasing of the field effect transistor. This voltage limiting circuit includes m voltage-limiting elements, wherein n and m are integers (1, 2, 3, . . . ) and n is equal to or greater than m. In a preferred embodiment, the amplifier is formed of two field effect transistors connected in push-pull relation, each field effect transistor being provided with an impedance converter and a voltage-limiting circuit as described above. |
