发明名称 INTRAAOFFICE PHASE SYNCHRONIZER
摘要 PURPOSE:To improve reliability and mounting density with a circuit scaled down, by generating a gate signal which covering the extent of dispersion in frame phase and by detecting the frame position within the extent. CONSTITUTION:Discrimination circuit 16 generates discriminatively PCM signal transmitted inside an office and bit-phase synchronization 17 of generated signals is done; and then, shift register 20 delays its output bit by bit and each bit output is selectively allowed to pass through AND gates 241 24M. Gate-signal generating circuit 22, on the other hand, generates a gate signal covering the extent of the dispersion in frame position between PCM signals of each circuit transmitted within the office, and during the interval of this gate signal, detection 21 of the frame- synchronizing code of the PCM signal is made, so that control circuit 23 will allow AND gates to open by selecting some of bit outputs of register 20 judging from the detection result. Consequently, the circuit can be scaled down and the improvement of reliability and mounting density can be attained.
申请公布号 JPS5466013(A) 申请公布日期 1979.05.28
申请号 JP19770133180 申请日期 1977.11.07
申请人 NIPPON TELEGRAPH & TELEPHONE 发明人 SAKAI YOUICHI;KOU MASAHIRO
分类号 H04J3/06;H04L5/22;H04L7/00;H04L7/04;H04Q11/04 主分类号 H04J3/06
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