| 摘要 |
A central station is connected to a ring bus system to which a number of separately addressable loads are connected through specific load receivers. The central station has a switching system by operation of selected switches of which, specific loads can be addressed. The ring bus system has a power line or bus, a clock line or bus, and a control line or bus. The clock line provides clock pulses during a selection cycle, and upon coincidence of a clock pulse with a pulse on the control bus, a specific load associated with a predetermined numbered pulse on the clock line can be addressed by sensing coincidence of the pulse on the control line and on the clock line. To separate selection cycles, a control signal is transmitted which may form a pause of clock pulses on the clock line. This control signal, in accordance with the invention, is represented by a series of pulses transmitted on a line other than the clock line, for example on the control bus. It is generated by a pulse generator in the central station to supply a predetermined number of such pulses on the control line only. The receivers have suitable receiver counters which respond to these pulses. Logic circuitry can distinguish between the selection pulses, which will have coincidence on the clock bus and on the control bus, and clock pulses which will appear only on the clock bus. The synchronization pulses are of a predetermined number which will appear only on the control bus so that the respective function synchronization counters in the central station and in the receiver will be synchronized anew for each selection cycle by digital evaluation of the function synchronization pulses.
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