| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacturing method of the same, which can reduce parasitic capacitance and reduce electric field concentration on each end of a gate electrode and a conductive layer (source field plate).SOLUTION: A semiconductor device 1 comprises: a group III nitride semiconductor lamination structure 2 including hetero junction; an insulation layer 29 on the group III nitride semiconductor lamination structure, which has a gate opening 32 reaching the group III nitride semiconductor lamination structure 2; a gate insulation film 33 which covers a bottom and a side part of the gate opening 32; a gate electrode 4 formed on the gate insulation film 33 in the gate opening 32; a source electrode 5 and a drain electrode 3 which are arranged at a distance from the gate electrode 4 so as to sandwich the gate electrode 4 and electrically connected to the group III nitride semiconductor lamination structure 2, respectively; and a source field plate 8 which is embedded in the insulation layer 29 between the gate electrode 4 and the drain electrode 3 and isolated from the gate electrode 4 by the gate insulation film 33, and electrically connected to the source electrode 5.SELECTED DRAWING: Figure 3 |
