| 摘要 |
PURPOSE:To expand the range of bit-block error detection without increase, especially in check-bit information and in the number of gates needed for coding and decoding, by providing specific conditions to the H matrix as a code. CONSTITUTION:This system is provided with processor 4 and coding circuit 2 which generates a K number of b-bit data blocks D0, D1...Dk-1 as pieces of data information and check blocks C0, C1...Cr-1 for the (r) value under the relation as shown by equation (1). Then data with an additional check bit is processed by decoding circuit 6 and error-detection circuit 27, so that error detection signal 28 will be outputted which can not be corrected. This decoding circuit 6 is provided with syndrome generating circuit 9 which generates syndrome Si in the relation of equation (2) from received information 8, error pattern generating circuit 11 which generates error pattern Kj from the syndrome of circuit 9, and block pointer generating circuit 13 which generates block pointers Bdj to check blocks. |
