| 摘要 |
PURPOSE:To evade the redundancy of a program due to a branch instruction as to the circuit which can perform a process by combining an any number of instruction words, without fixing the number of instruction words by a SCAP instruction. CONSTITUTION:An instruction code inputted from terminal 13 is applied to both the 1st instruction decoder 7 which detects instruction word information and the 2nd instructuin decoder 8 which outputs an indication signal for the operation procedure of logical operation circuit 9. The input instruction code is decoded by decoder and sent to arithmetic 9 for arithmetic process, and a skip signal obtained through the arithmetic is applied to pulse generator 10 as a trigger signal. Decoder 7 decodes the input code into an instruction-number signal which corresponds to the instruction code and outputs it to each signal line. The instruction-word number signal outputted to the signal line is supplied to generator 10 so as to output a pulse with the pulse width which corresponds to the instruction-word number detected decoder 7 triggered by the output of arithmetic circuit 9, thereby controlling logic circuit 9. |
