| 摘要 |
<p>PURPOSE:To correct the all data of the memory when the initial program loader is started by writing the data of correct parity featuring the same code as the NOP order into the memory storing the program with every advance of the program counter. CONSTITUTION:Control circuit 63 transmits signal T indicating the execution cycle. OR circuit 73 and 74 set FF75 and delivers the NOP signal. Thus, the NOP order is sent to data bus 1 and then set to order register 61. The NOP order is then decoded through decoder 62 to be supplied to control circuit 63. In the execution cycle of the order, signal T is supplied to AND circuit 78. As a result, write signal W is delivered from circuit 78, and the code of the NOP order on bus 1 is written to the zero address of the memory.</p> |
