| 摘要 |
PURPOSE:To facilitate miniaturization and circuit integration by setting the signals to become control signal with digital quantities and making sampling and holding accurate and safe. CONSTITUTION:A counter circuit 35 counts clock pulses and outputs cyclical count numbers. It is cleared by a vertical synchronizing signal and the count number thereof is applied to latch circuits 80 thru 85 and is applied to time difference data processing and pulse width modulation circuit parts 87 thru 90 by being pused as scanning pulses. The latch circuits 80, 81 measure the time duration of capstan tack pulses, and applies the same to the circuit 87, from which they are outputted as the pulses for automatic frequency controlling of capstan. The circuits 82, 83 measure the respective time durations of the capstan tack pulses and vertical synchronizing signal at the recording and control pulses and vertical synchronizing signal at the reproducing and output the pulses for automatic phase controlling of capstan through the circuit 84. Thereby, sampling and holding may be made sure and safe and miniaturization and circuit integration made easy. |
