发明名称 INITIAL STATE SETTING CIRCUIT
摘要 <p>PURPOSE:To increase the time constant prescribing the delay time for the automatic clear circuit of the electronic desk computer and the like by utilizing the charge share between plural numbers of capacitors, and thus to obtain the reset signal of a long delay time through addition of a small number of the elements. CONSTITUTION:After MOSFETQ5-Q10 constituting the ratch circuit is turned on, delay time deciding capacitor C1 is charged gradually via MOSFETQ1, Q2 and Q3 of the switching element which is turned on and off according to clock pulse CP. The ratch circuit is triggered by the charging voltage, the state of the ratch circuit is inverted with delay of a fixed time after generation of pulse CP, and thus the initial state signal is produced through ratch circuit. Capacitor C2 featuring a smaller capacity than delay time deciding capacitor C1 is connected to the ratch circuit at the joint between switching element Q2 and Q3. Then the potential of the opposite- phase potential to the charge of capacitor C1 is charged in accordance with pulse</p>
申请公布号 JPS5447520(A) 申请公布日期 1979.04.14
申请号 JP19770113352 申请日期 1977.09.22
申请人 HITACHI LTD 发明人 SAKAGUCHI JIROU
分类号 G06F15/02;G06F1/00;G06F1/24;H03K17/22 主分类号 G06F15/02
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