| 摘要 |
PURPOSE:To make it possible to easily produce demodulation clock by recording the portions having more 0 bits in a reversed manner and by supplying frame synchronous signals with code patterns corresponding to the information indicating the recording polarity. CONSTITUTION:When the date in a channel have more 1 bits, they are allowed to pass as they are, whereas when they have more 0 bits they are made to pass with a reversed polarity. As a result, 1 bits become more at all times. The information indicating the polarity of the data coding operation of the channel for reproduction is fed to a frame synchronous signal producing circuit 7. The data thus coded are fed to the circuit 7. The frame synchronous signals are generated and added to the both channel data from polarity control circuits 6r and 6l. At this time, the frame synchronous signals are formed into bit pattern. |
