| 摘要 |
In illustrated embodiments, at least one analogue shift register has a number of parallel inputs and one series output. A number of individual evaluating circuits receive the signal to be filtered and supply respective output quantities of charge equal to the product of the difference between the relevant signal value and a predetermined minimum or maximum value, and a respective individual evaluation factor. The output of each evaluating circuit can be connected via a switching element to an associated parallel input. The capacity of every storage position of the shift register is at least such that it is always able to accommodate the maximum quantity of charge supplied by the preceding storage position, and when the storage position has a parallel input, can additionally accommodate the maximum quantities of charge supplied by the associated evaluating circuit (s). Various modifications are disclosed for reducing the space requirement of a transversal filter when implemented, for example, as a CCD. |
