| 摘要 |
A generalized and modular logic circuit for arithmetic/logical units of a digital computer, adaptable to large scale integration (LSI) manufacturing techniques. Each logic circuit includes combinational logic networks which provide inputs to storage circuitry. The storage circuitry is sequential in operation and employs clocked dc latches. Out-of-phase clock trains are used to control the latches. With each storage circuit, there is provided additional circuitry for providing an input which is independent of the combinational logic network. A logic unit comprised of a plurality of the logic circuits is constructed to interconnect the output of a storage circuit to the independent input of another logic circuit so that each latch acts as one position of a shift register having inputs/outputs independent of the system inputs/outputs. |
