| 摘要 |
PURPOSE:To improve a high-speed property and the efficiency of power, by decreasing junction capacity while preventing the injection of a small number of unnecessary carriers. CONSTITUTION:Ranges 22, 11, 132 form a PnP transistor Tp that employs each range as an emitter, a base and a collector. Ranges 10, 133, 14a and 11a constitute a SIT or FETTa that uses each range as source, gate, drain and channel ranges. Ranges 134 organize sources with the range 10. There are insulating materials 130 among the lower surfaces of gate ranges 131 and the ranges 11. Thus, the switching speed of a SITL is improved because there is no parasitic junction capacity on the lower surfaces of the gate ranges 131. |
