发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To enable the reproduction of carrier wave of quadruple phase modulation waves with a simple constitution, by processing an output of three phase detection circuits at a specific phase relation at the base band. CONSTITUTION:A quadruple phase modulation wave is inputted to phase detectors 2-4 in parallel, it is applied to each phase detector directly from a voltage controlled oscillator 16 with a phase shift of II/2 and II/4, and signals of A, B (delayed by II/2 from A), and C (delayed by II/4 from A) appear at each output. The signals A and B are shaped at shape circuits 8, 9 and a signal E is obtained at an exclusive logical sum circuit 12. A difference D between the signals A and B is obtained, the signals C, D are shaped at shape circuits 10, 11, and a signal F is obtained at an exclusive logical sum circuit 13. The signals E, F have an output of the period II and the phase is shifted by II/4 mutually. Thus, when the signals E, F pass through an exclusive logical sum circuit 14, a signal G which has zero points at an odd number times II/4 in the period II/2, is obtained and it is applied to the voltage controlled oscillator 16.
申请公布号 JPS57124955(A) 申请公布日期 1982.08.04
申请号 JP19810010337 申请日期 1981.01.27
申请人 NIHON MUSEN KK 发明人 KIZAWA TAKAO
分类号 H04L27/227 主分类号 H04L27/227
代理机构 代理人
主权项
地址