发明名称 COUNTER SYSTEM
摘要 PURPOSE:To establish counter circuit highly reliable, by operating three counters synchronizingly, by making detectable faulty counter even if one of the counters is in failure, and keeping the synchronizing operation with the remaining counters through separation of failed counter.
申请公布号 JPS5421253(A) 申请公布日期 1979.02.17
申请号 JP19770086232 申请日期 1977.07.19
申请人 FUJITSU LTD 发明人 IHI TAKASHI;HAMADA TAKASHI;SUGIHARA SUMIKO
分类号 H03K21/40;(IPC1-7):03K21/34 主分类号 H03K21/40
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