发明名称 LOGIC ANALYSER
摘要 PURPOSE:To make it possible to discriminate data containing by a method wherein a glitch is detected from an input logic signal by a glitch detecting means and the display of the character of the input signal containing the glitch is controlled by a character display control means. CONSTITUTION:The data component and the glitch component among the input logic signals from a probe 10 are stored by respective memory circuits 14, 18 through a block 12 and, when a display order is inputted from a keyboard 30, CPU24 transmits the memory contents of the memory circuits 14, 18 to RAM28 on the basis of the firm wear of ROM26. In addition, a display mode and display region information selected by the keyboard 30 are stored by RAM 28 and a display control circuit 32 repeatedly read the content of the display RAM region of RAM28 to display a logic state by CRT34.
申请公布号 JPS58216962(A) 申请公布日期 1983.12.16
申请号 JP19830096570 申请日期 1983.05.31
申请人 SONII TEKUTORONIKUSU KK 发明人 YOKOGAWA HIDEMI;MUROOKA RIKICHI;FUKUZAWA MIYUKI;TOMIOKA MACHIKO
分类号 G01R13/28;G01R13/20;G06F11/25;(IPC1-7):01R13/20 主分类号 G01R13/28
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