| 摘要 |
The digital signals representing successive picture points of a digital television video signal is caused to pass through, in succession, two delay circuits each providing a delay of one television line interval. This makes three places available where shift registers may be connected for stepping the digital signals at picture point intervals, so that a two-dimensional array of neighboring picture points located on adjacent portions of three television lines can be made simultaneously available for correcting the signal of the central picture point if it is found to be defective. A defective picture point is caused to be represented by a null value of digital signals by an error-correcting circuit. Thus, at the same places where the video signal shift registers are connected, gates for detecting null signals may be connected, each of which is followed by one-bit shift registers for addressing a read-only memory for controlling the choice of digital signal pairs from the picture point array which will be averaged in an averaging circuit to provide the output signal. If the digital signal of the central point of the picture point array is not defective, duplicates of this signal are provided to the averaging circuit under control of the read-only memory so that the original signal will proceed to the output of the circuit. If this signal is defective, however, the read-only memory selects a pair of signals corresponding to picture points bracketing the central point to provide the average signal, in accordance with a program that takes account of which points in the picture point array are defective. If no bracketing pair of points provides nondefective signals, the memory causes a medium gray signal to be substituted for the defective center point signal. This system has the advantage that the same stages are used and the same operating times occur in the processing of every picture point, whether the signal for that point is defective or not.
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