发明名称 WERKWIJZE VOOR HET VERVAARDIGEN VAN EEN GEINTEGREERDE HALFGELEIDERSCHAKELING MET VAN EEN GEISOLEERDE STUURELEKTRODE VOORZIENE VELDEFFECTTRANSISTOREN.
摘要 In connection with the fabrication of an integrated circuit, a method for simultaneously completing the formation of a contact, an interconnect, a gate and a source or drain is disclosed. An integrated circuit field effect structure wherein a diffused silicon area is connected directly to a polysilicon member by conductive silicon and more specifically the source or drain of one device is directly and continuously connected to the gate of an adjacent device by a conductive silicon member.
申请公布号 NL159534(B) 申请公布日期 1979.02.15
申请号 NL19710017040 申请日期 1971.12.13
申请人 INTEL CORPORATION, SANTA CLARA, CALIFORNIE, VER. ST. V. AM. 发明人 LESLIE LASZLO VADASZ TE SUNNYVALE;CALIFORNIE;VER. ST. V. AM.
分类号 H01L21/00;H01L23/522;H01L23/532;H01L27/088;H01L29/00;(IPC1-7):01L21/72;01L29/78;01L21/76 主分类号 H01L21/00
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