发明名称 SUPERVISORY SYSTEM FOR CIRCUIT ERROR
摘要 PURPOSE:To exercise centralized supervision over error rates of each terminal office and circuit, by achieving the gathering, recording and display of the information on errors transmitted to a master telemeter station after detected through the comparison of an error detection circuit between an error-detecting pulse pattern and the output pattern of a pulse pattern generator.
申请公布号 JPS5416113(A) 申请公布日期 1979.02.06
申请号 JP19770081178 申请日期 1977.07.07
申请人 FUJITSU LTD;KOBE STEEL LTD 发明人 KOUNO YOSHIAKI;HOSHINO KEIYUU;SASAKI KATSUMI;FUKUDA MAKOTO
分类号 H04J3/14;(IPC1-7):04J3/14 主分类号 H04J3/14
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