发明名称 Switching circuit
摘要 A switching circuit including a flip-flop which receives a switching signal that sets the flip-flop and which receives a reset signal which resets the flip-flop. A latching circuit, responsive to a clock signal, is connected to receive an output signal of the flip-flop for developing a latching circuit output signal corresponding to the output signal of the flip-flop at a time the clock signal is applied thereto. A reset signal and a clock signal developed repetitively and out of phase are respectively applied to the flip-flop and the latching circuit so that the latching circuit output signal can change only after the flip-flop has been reset.
申请公布号 US4138613(A) 申请公布日期 1979.02.06
申请号 US19770823163 申请日期 1977.08.09
申请人 KABUSHIKI KAISHA DAINI SEIKOSHA 发明人 TANAKA, KOJIRO
分类号 G04G5/00;H03K3/037;H03K5/1252;(IPC1-7):H03K5/01;H03K3/28 主分类号 G04G5/00
代理机构 代理人
主权项
地址