发明名称 DATA LIMITER WITH CURRENT CONTROLLED RESPONSE TIME
摘要 <p>A data limiter (30) in a paging receiver for converting an analog signal to a digital signal, the data limiter (30) having a variable time constant. The data limiter (30) includes an amplifying means (34) and an integrating means (36). The amplifying means (34), being responsive to the analog input signal generated from a receiving means (12) of the paging receiver, generates a reference signal depending upon a variable bias current input to the amplifying means. The integrating means (36), being responsive to the reference signal, generates a comparison signal depending upon a variable gain input. The amplifying means (34) responsive to the comparison signal compares the comparison signal to the input signal for generating a digital output signal. A processing means (56) of the paging receiver generates a first control signal for modifying the variable bias current input and a second control signal for modifying the variable gain input. Additionally, the processing means (56) generates a third control signal being applied to the integrating means (36) for effecting a storage of the comparison signal in the integrating means (36).</p>
申请公布号 WO1988005229(A1) 申请公布日期 1988.07.14
申请号 US1987003294 申请日期 1987.12.14
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