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发明名称
ERROR CHECK SYSTEM OF ARTHMETIC CIRCUIT
摘要
申请公布号
JPS5414652(A)
申请公布日期
1979.02.03
申请号
JP19770079801
申请日期
1977.07.06
申请人
FUJITSU LTD
发明人
KIMURA HISASHI;HAYAKAWA AKIHIRO;ICHII HIROSHI;MOROTO SEIKOU;KOUKETSU HIROTOSHI;TANAKA HIDEHIKO
分类号
G06F9/22;G06F11/00
主分类号
G06F9/22
代理机构
代理人
主权项
地址
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