发明名称 PARITY INSPECTION SYSTEM
摘要 PURPOSE:To surely detect the error in a plurality bits for the same semiconductor memory element at the same time, by effectively using the circuit element including the semiconductor memory element, in a semiconductor memory unit having a plurality of data bits.
申请公布号 JPS5413229(A) 申请公布日期 1979.01.31
申请号 JP19770078721 申请日期 1977.07.01
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 TANAKA NORIYUKI
分类号 G06F11/10;G06F12/16;G11C29/00 主分类号 G06F11/10
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